Mid-Level Microelectronics Packaging Engineer

Company: BOEING
Location: Clarksville
Posted on: November 25, 2022

Job Description:

Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.Within BR&T, Boeing's Solid State Electronics Development organization (SSED) performs microelectronics technology development and design for aerospace systems. - We develop digital, analog, and RF Systems on Chip (SoCs) for radar, navigation, electronic warfare, communications, processing, and other electronic systems. These systems are used on Boeing airborne, terrestrial, and satellite platforms. Designs are implemented with state of the art semiconductor process technologies including CMOS, GaAs, GaN, and SiGe. SSED uses external wafer fabrication but performs design (architecture, RTL, synthesis, circuits, physical design, verification, packaging and test) in house. - SSED has numerous microelectronics projects, funded both by internal Boeing customers and external Government Science and Technology (S&T) customers. SSED's large staff of microelectronics engineers conduct research, design, and test microelectronics hardware in support of these projects. - You won't be bored in our group! - Join us and put your passion, determination, and skill to work building the future! -We are seeking a Mid-Level Microelectronics Packaging Engineer with a strong background in the current SOTA for advance packaging as it relates to microelectronics. A successful candidate will lead the innovation and development of novel 2.5D / 3D advanced packaging for high-speed/mixed signal/RF microelectronics applications inclusive of electrical performance of both active and passive elements, thermal-mechanical performance and design for manufactability and reliability. This role will be based in Annapolis Junction, MD, Huntington Beach, CA, or Huntsville, AL. This position allows telecommuting. The selected candidate will be required to perform some work onsite at one of the listed location options.This position requires the ability to obtain a U.S Security Clearance for which the US Government requires US Citizenship. An interim and/or final US Secret clearance Post Start is required.Position Responsibilities:

• Leads advanced packaging analysis based on system requirements, development of architectural approaches, and detailed specifications
• Leads advanced packaging design reviews of testing and analysis activity to assure compliance to program requirements
• Leads activities in support of making recommendations for advanced packaging suppliers as well as EDA vendors
• Coordinates engineering support throughout the lifecycle of the program product
• Resolves complex issues on critical programs related to advanced packaging approaches, requirements, specifications and design
• Leads technical aspect of proposal preparation related to advanced packaging
• Identifies critical performance metrics and develops processes to mitigate program risks for computing them.
• Demonstrated track record as a self-motived, independent, high-performance team member
• Excellent verbal and written communication abilityBasic Qualifications (Required Skills/Experience):
  • Bachelor's, Master's or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry
  • 1+ years of experience in the field of microelectronics packaging including MCM, heterogeneous integration, 3D chip stacking, etc
  • Experience with complex packaging architectures on circuit performance including speed, thermal, etc
  • Experience with SWaP-C constrained electronics development
  • Experience with EDA tool flow and vendor supports including but are not limited to chiplets floor-planning, interposer design, SiP optimization, physical simulation, and chiplets assemblyPreferred Qualifications (Desired Skills/Experience):
    • Understanding and experience with design, development and testing of advanced packaging techniques. - This includes conventional packaging techniques like ASIC, BGA, 2.5D / 3D heterogeneous integration, and familiarity with commonly available supply chain for fabrication, assembly, packaging and test of multi-chip-modules (MCMs) and System-in-Package (SiP) for digital and RF products.
    • Understanding of 3DIC development flow and tools; chip-level and substrate requirements, architecture, design, and verification; foundry interface and fabrication; and final characterization and test including electrical, mechanical and thermal considerations.
    • Understanding of commercial microelectronics fabrication process technologies, including standard substrates (organic, silicon and glass) and PCB manufacturing processes
    • Hold patents in advanced microelectronics packaging architectures and performance improvements
    • Experience working building and managing Outsourced Assembly and Test (OSAT) vendor supply chain
    • Understand various approaches and come up with strategies to mitigate Known Good Die (KGD) risks and improve functional SiP chip yield
    • Experience organizing and leading cross-functional engineering teams including internal and external organizations
    • Experience supporting proposals (technical, cost, and schedule) with advanced microelectronics packaging content
    • Experience with technical, cost, and schedule management
    • Experience supporting military programs including engagement with customers
    • Active security clearanceTypical Education/Experience:Bachelor's degree and typically 5 or more years' experience in an engineering classification or a Master's degree with typically 3 or more years' experience in an engineering classification or a PhD degree with experience in an engineering classification. Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry. ABET is the preferred, although not required, accreditation standard.Relocation:This position offers relocation based on candidate eligibility.Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies.Shift:This position is for first shift.BRT_MSA
      Export Control Requirements: U.S. Government Export Control Status: This position must meet export control compliance requirements. To meet export control compliance requirements, a "U.S. Person" as defined by 22 C.F.R. -120.15 is required. "U.S. Person" includes U.S. Citizen, lawful permanent resident, refugee, or asylee.
      Equal Opportunity Employer:Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.

Keywords: BOEING, Clarksville , Mid-Level Microelectronics Packaging Engineer, Engineering , Clarksville, Tennessee